2015-01-06 03:13:44 +00:00
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#include "DROMultiplexer.h"
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#include "JuceHeader.h"
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2015-02-13 03:13:54 +00:00
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/// Jeff-Russ added guard against windows.h include if not windows:
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#ifdef _WIN32 // covers both 32 and 64-bit
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#include <Windows.h>
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#else
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#include "windows.h"
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#endif
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/// Jeff-Russ added to replace mising itoa for xcode:
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#if __APPLE__
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#include "itoa.h"
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#endif
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2015-01-06 03:13:44 +00:00
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// Used by the first recording instance to claim master status
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DROMultiplexer* DROMultiplexer::master = NULL;
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2015-01-09 05:20:19 +00:00
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// Mutex between plugin instances
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CriticalSection DROMultiplexer::lock;
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2015-01-06 03:13:44 +00:00
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static Bit8u dro_header[] = {
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'D', 'B', 'R', 'A', /* 0x00, Bit32u ID */
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'W', 'O', 'P', 'L', /* 0x04, Bit32u ID */
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0x0, 0x00, /* 0x08, Bit16u version low */
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0x1, 0x00, /* 0x09, Bit16u version high */
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0x0, 0x0, 0x0, 0x0, /* 0x0c, Bit32u total milliseconds */
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0x0, 0x0, 0x0, 0x0, /* 0x10, Bit32u total data */
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0x0, 0x0, 0x0, 0x0 /* 0x14, Bit32u Type 0=opl2,1=opl3,2=dual-opl2 */
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};
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static Bit8u dro_opl3_enable[] = {
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0x03, // switch to extended register bank
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0x05, // register 0x105
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0x01, // value 0x1
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0x02 // switch back to regular OPL2 registers
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};
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2015-01-06 13:25:51 +00:00
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// offsets for the 15 two-operator melodic channels
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// http://www.shikadi.net/moddingwiki/OPL_chip
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static Bit32u OPERATOR_OFFSETS[15][2] = {
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{0x000, 0x003}, // 0, 3
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{0x001, 0x004}, // 1, 4
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{0x002, 0x005}, // 2, 5
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{0x008, 0x00b}, // 6, 9
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{0x009, 0x00c}, // 7, 10
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{0x00a, 0x00d}, // 8, 11
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{0x100, 0x103}, // 18, 21
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{0x101, 0x104}, // 19, 22
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{0x102, 0x105}, // 20, 23
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{0x108, 0x10b}, // 24, 27
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{0x109, 0x10c}, // 25, 28
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{0x10a, 0x10d}, // 26, 29
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{0x110, 0x113}, // 30, 33
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{0x111, 0x114}, // 31, 34
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{0x112, 0x115}, // 32, 35
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};
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static Bit32u CHANNEL_OFFSETS[15]= {
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0x0,
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0x1,
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0x2,
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0x3,
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0x4,
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0x5,
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0x100,
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0x101,
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0x102,
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0x103,
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0x104,
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0x105,
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0x106,
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0x107,
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0x108,
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};
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2015-01-15 01:55:29 +00:00
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// bass drum uses two operators.
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// others use either modulator or carrier.
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static Bit32u PERCUSSION_OPERATORS[5][2] = {
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2015-01-15 03:07:49 +00:00
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{ 0x13, 0x10 }, // bd
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2015-01-15 01:55:29 +00:00
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{ 0x00, 0x14 }, // sd
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{ 0x12, 0x00 }, // tt
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{ 0x00, 0x15}, // cy
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{ 0x11, 0x00 }, // hh
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};
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static Bit32u PERCUSSION_CHANNELS[5] = {
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7, 7, 8, 8, 9
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// or 7, 8, 8, 9, 9?
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};
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2015-01-06 03:13:44 +00:00
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INLINE void host_writed(Bit8u *off, Bit32u val) {
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off[0] = (Bit8u)(val);
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off[1] = (Bit8u)(val >> 8);
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off[2] = (Bit8u)(val >> 16);
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off[3] = (Bit8u)(val >> 24);
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};
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2015-01-09 05:20:19 +00:00
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HANDLE conout;
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2015-01-06 03:13:44 +00:00
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DROMultiplexer::DROMultiplexer()
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{
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2015-01-09 06:53:33 +00:00
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InitCaptureVariables();
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2015-01-09 05:20:19 +00:00
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#ifdef _DEBUG
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AllocConsole();
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conout = GetStdHandle(STD_OUTPUT_HANDLE);
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#endif
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2015-01-06 03:13:44 +00:00
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}
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DROMultiplexer::~DROMultiplexer()
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{
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2015-01-09 05:20:19 +00:00
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#ifdef _DEBUG
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FreeConsole();
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#endif
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2015-01-06 03:13:44 +00:00
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}
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2015-01-06 13:25:51 +00:00
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DROMultiplexer* DROMultiplexer::GetMaster() {
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return DROMultiplexer::master;
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}
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2015-01-15 01:55:29 +00:00
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void DROMultiplexer::_CopyOplPercussionSettings(Hiopl* opl, int pIdx) {
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// input channel 1 is as good as any..
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int op1Off = opl->_GetOffset(1, 1);
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int op2Off = opl->_GetOffset(1, 2);
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Bit32u inAddr;
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Bit32u outAddr;
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Bit32u* outOff = PERCUSSION_OPERATORS[pIdx];
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// waveform select
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int base = 0xe0;
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if (outOff[0]) {
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inAddr = base + op1Off;
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outAddr = base + outOff[0];
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_CaptureRegWriteWithDelay(outAddr, opl->_ReadReg(inAddr));
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2015-01-09 06:53:33 +00:00
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}
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2015-01-15 01:55:29 +00:00
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if (outOff[1]) {
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inAddr = base + op2Off;
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outAddr = base + outOff[1];
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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}
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// other operator settings
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for (base = 0x20; base <= 0x80; base += 0x20) {
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if (outOff[0]) {
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inAddr = base + op1Off;
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outAddr = base + outOff[0];
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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}
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if (outOff[1]) {
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inAddr = base + op2Off;
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outAddr = base + outOff[1];
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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}
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}
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// channel wide settings
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int chInOff = opl->_GetOffset(1);
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inAddr = 0xc0 + chInOff;
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outAddr = 0xc0 + PERCUSSION_CHANNELS[pIdx];
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2015-01-15 03:07:49 +00:00
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_CaptureRegWrite(outAddr, 0x30 | opl->_ReadReg(inAddr)); // make sure L+R channels always enabled
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2015-01-15 01:55:29 +00:00
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}
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2015-01-06 13:25:51 +00:00
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2015-01-15 01:55:29 +00:00
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void DROMultiplexer::_CopyOplChannelSettings(Hiopl* opl, int inCh, int outCh) {
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2015-01-06 13:25:51 +00:00
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// read all instrument settings and write them all to the file
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2015-01-09 05:20:19 +00:00
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int op1Off = opl->_GetOffset(inCh, 1);
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int op2Off = opl->_GetOffset(inCh, 2);
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2015-01-06 13:25:51 +00:00
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Bit32u inAddr;
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Bit32u outAddr;
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// waveform select
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int base = 0xe0;
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inAddr = base + op1Off;
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outAddr = base + OPERATOR_OFFSETS[outCh][0];
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_CaptureRegWriteWithDelay(outAddr, opl->_ReadReg(inAddr));
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inAddr = base + op2Off;
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outAddr = base + OPERATOR_OFFSETS[outCh][1];
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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// other operator settings
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for (base = 0x20; base <= 0x80; base += 0x20) {
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inAddr = base + op1Off;
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outAddr = base + OPERATOR_OFFSETS[outCh][0];
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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inAddr = base + op2Off;
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outAddr = base + OPERATOR_OFFSETS[outCh][1];
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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}
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// channel wide settings
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2015-01-09 05:20:19 +00:00
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int chInOff = opl->_GetOffset(inCh);
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2015-01-06 13:25:51 +00:00
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inAddr = 0xc0 + chInOff;
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outAddr = 0xc0 + CHANNEL_OFFSETS[outCh];
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_CaptureRegWrite(outAddr, 0x30 | opl->_ReadReg(inAddr));
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2015-01-15 01:55:29 +00:00
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}
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void DROMultiplexer::TwoOpMelodicNoteOn(Hiopl* opl, int inCh) {
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const ScopedLock sl(lock);
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// find a free channel and mark it as used
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char addr[16];
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int outCh = _FindFreeChannel(opl, inCh);
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_DebugOut(" <- ");
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2015-02-13 03:13:54 +00:00
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/// _DebugOut(itoa((int)opl, addr, 16));
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2015-01-15 01:55:29 +00:00
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_DebugOut(" ");
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for (int i = 0; i < MELODIC_CHANNELS; i++) {
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Hiopl* tmpOpl = channels[i].opl;
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_DebugOut(NULL == tmpOpl ? "-" : tmpOpl->GetState(channels[i].ch));
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}
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//_DebugOut("\n");
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_CopyOplChannelSettings(opl, inCh, outCh);
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2015-01-06 13:25:51 +00:00
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// note frequency
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2015-01-15 01:55:29 +00:00
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int chInOff = opl->_GetOffset(inCh);
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int inAddr = 0xa0 + chInOff;
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int outAddr = 0xa0 + CHANNEL_OFFSETS[outCh];
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2015-01-06 13:25:51 +00:00
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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2015-01-15 01:55:29 +00:00
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_DebugOut(itoa(opl->_ReadReg(inAddr), addr, 16));
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2015-01-06 13:25:51 +00:00
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// note-on
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inAddr = 0xb0 + chInOff;
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outAddr = 0xb0 + CHANNEL_OFFSETS[outCh];
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_CaptureRegWrite(outAddr, opl->_ReadReg(inAddr));
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2015-01-15 01:55:29 +00:00
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_DebugOut(itoa(opl->_ReadReg(inAddr), addr, 16));
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_DebugOut("\n");
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2015-01-06 03:13:44 +00:00
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}
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void DROMultiplexer::TwoOpMelodicNoteOff(Hiopl* opl, int ch) {
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2015-01-09 05:20:19 +00:00
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const ScopedLock sl(lock);
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2015-01-06 13:25:51 +00:00
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int chOff = opl->_GetOffset(ch);
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OplCh_t key;
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key.opl = opl;
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key.ch = ch;
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int outCh = channelMap[key];
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2015-01-09 06:53:33 +00:00
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char n[8];
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_DebugOut(itoa(outCh, n, 16));
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_DebugOut(" note off\n");
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2015-01-06 13:25:51 +00:00
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// note-off
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Bit32u inAddr = 0xb0 + chOff;
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Bit32u outAddr = 0xb0 + CHANNEL_OFFSETS[outCh];
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_CaptureRegWriteWithDelay(outAddr, opl->_ReadReg(inAddr));
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}
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2015-01-06 03:13:44 +00:00
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2015-01-09 06:53:33 +00:00
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void DROMultiplexer::_DebugOut(const char* str) {
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2015-01-09 05:20:19 +00:00
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#ifdef _DEBUG
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DWORD count;
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count = strlen(str);
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WriteConsole(conout, str, count, &count, NULL);
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#endif
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}
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int DROMultiplexer::_FindFreeChannel(Hiopl* opl, int inCh) {
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2015-01-06 13:25:51 +00:00
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int i = 0;
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while (i < MELODIC_CHANNELS) {
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2015-01-09 05:20:19 +00:00
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if (NULL == channels[i].opl || !channels[i].opl->IsActive(channels[i].ch)) {
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channels[i].opl = opl;
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channels[i].ch = inCh;
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channelMap[channels[i]] = i;
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char n[8];
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2015-01-09 06:53:33 +00:00
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_DebugOut(itoa(i, n, 16));
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2015-01-06 13:25:51 +00:00
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return i;
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}
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i += 1;
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}
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2015-01-09 05:20:19 +00:00
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_DebugOut("Could not find free channel!");
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2015-01-06 13:25:51 +00:00
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return 0;
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2015-01-06 03:13:44 +00:00
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}
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2015-01-15 01:55:29 +00:00
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void DROMultiplexer::PercussionChange(Hiopl* opl, int pIdx) {
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2015-01-09 05:20:19 +00:00
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const ScopedLock sl(lock);
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2015-01-15 01:55:29 +00:00
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_CopyOplPercussionSettings(opl, pIdx);
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Bit8u val = opl->_ReadReg(0xbd);
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2015-01-15 03:07:49 +00:00
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Bit8u maskOut = 1 << abs(4 - pIdx);
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if (0 == (val & maskOut)) { // note-off
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_CaptureRegWriteWithDelay(0xbd, 0xBD & (0xe0 | ~maskOut));
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} else { // note-on
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_CaptureRegWriteWithDelay(0xbd, OxBD | maskOut);
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2015-01-15 01:55:29 +00:00
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}
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2015-01-06 03:13:44 +00:00
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}
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void DROMultiplexer::InitCaptureVariables() {
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captureHandle = NULL;
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captureLengthBytes = 0;
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lastWrite = -1;
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captureStart = -1;
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2015-01-09 06:53:33 +00:00
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channelMap.clear();
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for (int i = 0; i < MELODIC_CHANNELS; i++) {
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channels[i].opl = NULL;
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channels[i].ch = -1;
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}
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2015-01-15 03:07:49 +00:00
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OxBD = 0x20; // percussion mode should always be enabled
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2015-01-06 03:13:44 +00:00
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}
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2015-01-09 05:20:19 +00:00
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bool DROMultiplexer::StartCapture(const char* filepath, Hiopl *opl) {
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2015-01-06 03:13:44 +00:00
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captureHandle = fopen(filepath, "wb");
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2015-01-09 05:20:19 +00:00
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if (captureHandle) {
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DROMultiplexer::master = this;
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lastWrite = -1;
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captureLengthBytes = 0;
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captureStart = Time::currentTimeMillis();
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fwrite(dro_header, 1, sizeof(dro_header), captureHandle);
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for (int i = 0; i <= 0xff; i++) {
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_CaptureRegWrite(i, 0);
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}
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_CaptureOpl3Enable();
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for (Bit8u i = 0x20; i <= 0x35; i++) {
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_CaptureRegWrite(i, opl->_ReadReg(i));
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}
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for (Bit8u i = 0x40; i <= 0x55; i++) {
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_CaptureRegWrite(i, opl->_ReadReg(i));
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}
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for (Bit8u i = 0x60; i <= 0x75; i++) {
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_CaptureRegWrite(i, opl->_ReadReg(i));
|
|
|
|
}
|
|
|
|
for (Bit8u i = 0x80; i <= 0x95; i++) {
|
|
|
|
_CaptureRegWrite(i, opl->_ReadReg(i));
|
|
|
|
}
|
2015-01-15 03:07:49 +00:00
|
|
|
_CaptureRegWrite(0xbd, OxBD | (opl->_ReadReg(0xbd) & 0xc0)); // enable percmode, copy tremolo and vibrato depth only
|
2015-01-09 05:20:19 +00:00
|
|
|
for (Bit8u i = 0xc0; i <= 0xc8; i++) {
|
|
|
|
_CaptureRegWrite(i, opl->_ReadReg(i) | 0x30); // enable L + R channels
|
|
|
|
}
|
|
|
|
for (Bit8u i = 0xe0; i <= 0xf5; i++) {
|
|
|
|
_CaptureRegWrite(i, opl->_ReadReg(i));
|
|
|
|
}
|
2015-01-06 03:13:44 +00:00
|
|
|
}
|
2015-01-09 05:20:19 +00:00
|
|
|
return (NULL != captureHandle);
|
2015-01-06 03:13:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DROMultiplexer::StopCapture() {
|
|
|
|
if (NULL != captureHandle) {
|
|
|
|
Bit16u finalDelay = (Bit16u)(Time::currentTimeMillis() - lastWrite);
|
|
|
|
_CaptureDelay(finalDelay);
|
|
|
|
Bit32u lengthMilliseconds = (Bit32u)(finalDelay + Time::currentTimeMillis() - captureStart);
|
|
|
|
host_writed(&dro_header[0x0c], lengthMilliseconds);
|
|
|
|
host_writed(&dro_header[0x10], captureLengthBytes);
|
|
|
|
//if (opl.raw.opl3 && opl.raw.dualopl2) host_writed(&dro_header[0x14],0x1);
|
|
|
|
//else if (opl.raw.dualopl2) host_writed(&dro_header[0x14],0x2);
|
|
|
|
//else host_writed(&dro_header[0x14],0x0);
|
|
|
|
host_writed(&dro_header[0x14], 0x1); // OPL3
|
|
|
|
fseek(captureHandle, 0, 0);
|
|
|
|
fwrite(dro_header, 1, sizeof(dro_header), captureHandle);
|
|
|
|
fclose(captureHandle);
|
|
|
|
}
|
|
|
|
InitCaptureVariables();
|
2015-01-06 13:25:51 +00:00
|
|
|
DROMultiplexer::master = NULL;
|
2015-01-06 03:13:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DROMultiplexer::_CaptureDelay(Bit16u delayMs) {
|
|
|
|
Bit8u delay[3];
|
|
|
|
delay[0] = 0x01;
|
|
|
|
delay[1] = delayMs & 0xff;
|
|
|
|
delay[2] = (delayMs >> 8) & 0xff;
|
|
|
|
fwrite(delay, 1, 3, captureHandle);
|
|
|
|
captureLengthBytes += 3;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DROMultiplexer::_CaptureRegWrite(Bit32u reg, Bit8u value) {
|
|
|
|
if (reg <= 0x4) {
|
|
|
|
Bit8u escape = 0x4;
|
|
|
|
fwrite(&escape, 1, 1, captureHandle);
|
|
|
|
captureLengthBytes += 1;
|
|
|
|
}
|
|
|
|
Bit8u regAndVal[2];
|
|
|
|
regAndVal[0] = (Bit8u)reg;
|
|
|
|
regAndVal[1] = value;
|
|
|
|
fwrite(regAndVal, 1, 2, captureHandle);
|
|
|
|
captureLengthBytes += 2;
|
2015-01-15 01:55:29 +00:00
|
|
|
if (0xbd == reg) {
|
|
|
|
OxBD = value;
|
|
|
|
}
|
2015-01-06 03:13:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DROMultiplexer::_CaptureRegWriteWithDelay(Bit32u reg, Bit8u value) {
|
|
|
|
if (NULL != captureHandle) {
|
|
|
|
Bit64s t = Time::currentTimeMillis();
|
|
|
|
if (lastWrite >= 0) {
|
|
|
|
// Delays of over 65 seconds will be truncated, but that kind of delay is a bit silly anyway..
|
|
|
|
_CaptureDelay((Bit16u)(t - lastWrite));
|
|
|
|
}
|
|
|
|
_CaptureRegWrite(reg, value);
|
|
|
|
lastWrite = t;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void DROMultiplexer::_CaptureOpl3Enable() {
|
|
|
|
fwrite(dro_opl3_enable, 1, 4, captureHandle);
|
|
|
|
captureLengthBytes += 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool DROMultiplexer::IsAnInstanceRecording() {
|
|
|
|
return NULL != DROMultiplexer::master;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool DROMultiplexer::IsAnotherInstanceRecording() {
|
|
|
|
return this->IsAnInstanceRecording() && this != DROMultiplexer::master;
|
|
|
|
}
|